diff options
| author | Ting Shen <phoenixshen@google.com> | 2019-01-28 18:15:00 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-05 13:41:45 +0000 |
| commit | dff29e0c65462258776b8fb821516faad3ec1394 (patch) | |
| tree | a711cd01310f677a54f6497be8f8f071b96be54c /src/arch/arm64/tables.c | |
| parent | 4929f4361936bcc994044dea5c79619746384d5e (diff) | |
bootmem: add new memory type for BL31
After CL:31122, we can finally define a memory type specific for BL31,
to make sure BL31 is not loaded on other reserved area.
Change-Id: Idbd9a7fe4b12af23de1519892936d8d88a000e2c
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://review.coreboot.org/c/31123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/arch/arm64/tables.c')
| -rw-r--r-- | src/arch/arm64/tables.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/arm64/tables.c b/src/arch/arm64/tables.c index f36679e67f..ec949fd83b 100644 --- a/src/arch/arm64/tables.c +++ b/src/arch/arm64/tables.c @@ -20,6 +20,8 @@ #include <boot/coreboot_tables.h> #include <symbols.h> +DECLARE_OPTIONAL_REGION(bl31); + void arch_write_tables(uintptr_t coreboot_table) { } @@ -28,6 +30,9 @@ void bootmem_arch_add_ranges(void) { bootmem_add_range((uintptr_t)_ttb, _ttb_size, BM_MEM_RAMSTAGE); + if (IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) && _bl31_size > 0) + bootmem_add_range((uintptr_t)_bl31, _bl31_size, BM_MEM_BL31); + if (!IS_ENABLED(CONFIG_COMMON_CBFS_SPI_WRAPPER)) return; bootmem_add_range((uintptr_t)_postram_cbfs_cache, |