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authorT Michael Turney <mturney@codeaurora.org>2018-04-24 10:15:46 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-04-30 06:25:58 +0000
commit3775f1c0e177b3667753bbf0087b7975f3ec712e (patch)
treec95237636d1f3c9a576e41538ff3354262e69a91 /src/arch/arm64/armv8
parent6e0f0f7f9c91f41eb40f4ef6979937caee168bdf (diff)
arm64: Add ARCH Timer
SoC sdm845 uses ARCH Timer Change-Id: I45e2d4d2c16a2cded3df20d393d2b8820050ac80 Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/25612 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/arch/arm64/armv8')
-rw-r--r--src/arch/arm64/armv8/lib/sysctrl.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/arm64/armv8/lib/sysctrl.c b/src/arch/arm64/armv8/lib/sysctrl.c
index 9cf26a5c69..ef3b455b65 100644
--- a/src/arch/arm64/armv8/lib/sysctrl.c
+++ b/src/arch/arm64/armv8/lib/sysctrl.c
@@ -1059,3 +1059,11 @@ void raw_write_cntfrq_el0(uint32_t cntfrq_el0)
{
__asm__ __volatile__("msr CNTFRQ_EL0, %0\n\t" : : "r" ((uint64_t)cntfrq_el0) : "memory");
}
+
+uint64_t raw_read_cntpct_el0(void)
+{
+ uint64_t cntpct_el0;
+
+ __asm__ __volatile__("mrs %0, CNTPCT_EL0\n\t" : "=r" (cntpct_el0) : : "memory");
+ return cntpct_el0;
+}