summaryrefslogtreecommitdiff
path: root/src/arch/arm/div0.c
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2021-02-06 14:39:54 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-07 21:59:19 +0000
commit12d3768ec5e5d121683d4c47e8fcef0af46c2e21 (patch)
tree68b21c9e61abc4e2e45c849debfa4b906a0e0acb /src/arch/arm/div0.c
parentb35adab86280e9328f598e5dbd71e8134ea10813 (diff)
nb/intel/pineview: Clean up FIXMEs in raminit
Using MCHBAR32_AND_OR() in these two cases changes the order of additions slightly. Originally, the MCHBAR offset and the base register offset (0x5a4/0x5b4) were added first. Due to the added parentheses in the register macros, now the complete register offset is calculated first and then added to MCHBAR. Associativity tells us that this doesn't change the result. Changes in the resulting binary were verified manually on the object file. Change-Id: Id10882225c8e82b02583aa73e73d661c25abdef9 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50355 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/arm/div0.c')
0 files changed, 0 insertions, 0 deletions