summaryrefslogtreecommitdiff
path: root/src/arch/arm/armv4/cache.c
diff options
context:
space:
mode:
authorNicholas Chin <nic.c3.14@gmail.com>2022-09-24 19:02:05 -0600
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-10-10 21:51:43 +0000
commit89d6d2b82c2515cd3d7aa6aec40b951fe33a4ec8 (patch)
tree8d037ea94930e220dc2e8d04ecf38b65da611cda /src/arch/arm/armv4/cache.c
parent7e9801171e6f54433a52278fc62e05f9bf59e4c7 (diff)
Documentation/flashing_firmware: Add info about SPI flash header
Some mainboards have a header connected to the SPI bus, which can be used to connect a second flash chip and override the onboard flash. This allows one to boot coreboot on the system without ever having to flash the onboard flash. HP boards with this header all seem to use the same 2x8 or 2x10 header layout, so document the pinout. Change-Id: Ic2bf1244adfb78872340f212519c6ab33e26646a Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67818 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/arm/armv4/cache.c')
0 files changed, 0 insertions, 0 deletions