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author | Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> | 2023-07-10 17:16:11 -0700 |
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committer | Martin L Roth <gaumless@gmail.com> | 2023-09-01 21:18:29 +0000 |
commit | 6cba9769897dd75086e3304550cb4e4b8167b8d3 (patch) | |
tree | 16192556b7d1c8f6e08a885e4d2c06e55ddff877 /src/acpi/pld.c | |
parent | 0dc607f68d318d670f3edc084280b8e5c339847e (diff) |
soc/intel/meteorlake: Validate CPU crashlog discovery table and records
CPU crashlog discovery table and crashlog record is considered
invalid if first 32bits of the table is either 0x0 (no crashlog)
or 0xdeadbeef (invalid crashlog).
Crashlog record is considered consumed if bit 31 is set. So in this
case stop processing the subsequent records.
BUG=b:289600699
TEST=Able to build and verified invalid records are skipped on
google/rex.
Change-Id: Ia81bd293a533217425e44473ae85b2115c85faf6
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76333
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/acpi/pld.c')
0 files changed, 0 insertions, 0 deletions