diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2024-03-22 16:23:23 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-03-23 17:29:10 +0000 |
commit | df9a040e75cc188ed89d0bada9a2b296b29b9976 (patch) | |
tree | 65934950e8b58edf727e112d7780d801511990b0 /spd/ddr4 | |
parent | 4ff23a22462fa2637be45a771fd4a22fa7e3d4ad (diff) |
soc/amd/genoa_poc/domain: refactor read_soc_memmap_resources
To bring genoa_poc more in line with the other AMD SoCs, move the
reporting of the memory map up to cbmem_top from the openSIL-specific
add_opensil_memmap function to read_soc_memmap_resources. This is a
preparation for making this code common for all newer AMD SoCs.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic06282baa3bb9a65d297b5717697a12d08605d2f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81388
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'spd/ddr4')
0 files changed, 0 insertions, 0 deletions