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authorLee Leahy <leroy.p.leahy@intel.com>2016-07-30 18:21:53 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-08-03 18:03:46 +0200
commit5fafc6ad540c12776d2cafa5bef0f5fca5b1e977 (patch)
treee957649af477d5c9584655cbbcde650953e0a89f /payloads
parent72fe7acbbb9ef81a30950accbc241e31fc772893 (diff)
soc/intel/quark: Support access to CPU CR registers
Add support to access CR0 and CR4. TEST=Build and run on Galileo Gen2. Change-Id: I8084b7824ae9fbcd55e11a7b5eec142591a7e279 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/16004 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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