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authorDuncan Laurie <dlaurie@google.com>2020-11-09 09:47:00 -0800
committerDuncan Laurie <dlaurie@chromium.org>2020-11-20 00:27:21 +0000
commit3b70ad8ecfadcc393a15f98cbf476a34dd6b135c (patch)
tree6905c1b44ca54dffb80f720336c15c3a58d6ff57 /payloads
parent15ca9034b39a7fe0d883c0406d3c7591163d33f4 (diff)
soc/intel/common: Use per-soc definition for BAR sizes
The various platform BARs are not always the same size across different SOCs, so use the defined size rather than a hardcoded value. This results in the following change on TGL which increased the MCHBAR size to 128K: -system 00:00: [mem 0xfedc0000-0xfeddffff] has been reserved +system 00:00: [mem 0xfedc0000-0xfedc7fff] has been reserved And fixes the following error output from the kernel: resource sanity check: requesting [mem 0xfedc0000-0xfedcdfff], which spans more than pnp 00:00 [mem 0xfedc0000-0xfedc7fff] Change-Id: I82796c2fc81dec883f3c69ae7bdcedc7d3f16c64 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47378 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
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