summaryrefslogtreecommitdiff
path: root/payloads/libpayload/libc
diff options
context:
space:
mode:
authorRavi Kumar Bokka <rbokka@codeaurora.org>2021-11-10 05:22:47 +0530
committerShelley Chen <shchen@google.com>2022-03-16 01:21:44 +0000
commit42fcb2a8f4f9b395ceb84f7d644864c596b0a9a2 (patch)
treeb291d70663775f1a34cee236a1d197adac8f1ce3 /payloads/libpayload/libc
parent19baa9d51e4f1b36473dc750735eb6e5345bebda (diff)
libpayload: Parse DDR Information using coreboot tables
BUG=b:182963902,b:177917361 TEST=Validated on qualcomm sc7280 development board Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e Reviewed-on: https://review.coreboot.org/c/coreboot/+/59193 Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/libpayload/libc')
-rw-r--r--payloads/libpayload/libc/coreboot.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c
index 72d7664b1a..f5695d62dd 100644
--- a/payloads/libpayload/libc/coreboot.c
+++ b/payloads/libpayload/libc/coreboot.c
@@ -260,6 +260,9 @@ static void cb_parse_cbmem_entry(void *ptr, struct sysinfo_t *info)
case CBMEM_ID_TYPE_C_INFO:
info->type_c_info = cbmem_entry->address;
break;
+ case CBMEM_ID_MEM_CHIP_INFO:
+ info->mem_chip_base = cbmem_entry->address;
+ break;
default:
break;
}