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authorAaron Durbin <adurbin@chromium.org>2016-07-12 16:46:20 -0500
committerAaron Durbin <adurbin@chromium.org>2016-07-13 21:57:49 +0200
commita277bacd56ff04e5b9818dd4913708fb85a8d8d8 (patch)
tree2c18b86beb5a024aa379f5a1feb405d1659485e0 /payloads/libpayload/include/mips
parentd41a338d55ec97bd5c9aa92ecb7dc163ff83dcd2 (diff)
soc/intel/apollolake: provide gpio _HIGH/_LOW macros
Internally, apollolake routes its interrupts as active high. This includes SCI, SMI, and ACPI. Therefore, provide helper macros such that the user can describe an interrupt's active high/low polarity more easily. It helps for readability when one is comparing gpio configuration next to APIC configuration in different files. Additionally, the gpio APIC macros always use a LEVEL trigger in order to let the APIC handle the filtering of the IRQ on its own end. BUG=chrome-os-partner:54977 Change-Id: Id8fdcd98f0920936cd2b1a687fd8fa07bce9a614 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15644 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Diffstat (limited to 'payloads/libpayload/include/mips')
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