diff options
author | Julius Werner <jwerner@chromium.org> | 2014-10-22 14:12:50 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-10 07:50:21 +0200 |
commit | 120aec0902663d2ed942c1542217791c46b8e406 (patch) | |
tree | 8ed8ab12743869df69d509f43a35799526b570cf /payloads/libpayload/drivers/serial/8250_mmio32.c | |
parent | 907fd12cf6c10b2a3d1edec09b23be5eeb4b9643 (diff) |
serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32
We have two drivers for a 100%-identical peripheral right now, mostly
because we couldn't come up with a good common name for it back when we
checked it in. That seems like a pretty silly reason in the long run.
Both Tegra and Rockchip SoCs contain UARTs that use the common 8250
register interface (at least for the very basic byte-per-byte transmit
and receive parts we care about), memory-mapped with a 32-bit register
stride. This patch combines them to a single 8250_mmio32 driver (which
also fixes a problem when booting Rockchip without serial enabled, since
that driver forgot to check for serial initialization when registering
its console drivers). The register accesses are done using readl/writel
(as Rockchip did before), since the registers are documented as 32-bit
length (with top 24 bits RAZ/WI), although the Tegra SoC doesn't enforce
APB accesses to have the full word length. Also fixed checkpatch stuff.
A day may come when we can also merge this driver into the (completely
different, with more complicated features and #ifdefs) 8250 driver for
x86 (which has MMIO support for 8-bit register stride only), both here
and in coreboot. But it is not this day. This day I just want to get rid
of a 99% identical file without expending too much effort.
BUG=None
TEST=Booted on Veyron_Pinky and Nyan_Blaze with and without serial
enabled, both worked fine (although Veyron has another kernel issue).
Change-Id: I85c004a75cc5aa7cb40098002d3e00a62c1c5f2d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e7959c19356d2922aa414866016540ad9ee2ffa8
Original-Change-Id: Ib84d00f52ff2c48398c75f77f6a245e658ffdeb9
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/225102
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9387
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads/libpayload/drivers/serial/8250_mmio32.c')
-rw-r--r-- | payloads/libpayload/drivers/serial/8250_mmio32.c | 113 |
1 files changed, 113 insertions, 0 deletions
diff --git a/payloads/libpayload/drivers/serial/8250_mmio32.c b/payloads/libpayload/drivers/serial/8250_mmio32.c new file mode 100644 index 0000000000..285f7f6dac --- /dev/null +++ b/payloads/libpayload/drivers/serial/8250_mmio32.c @@ -0,0 +1,113 @@ +/* + * Copyright 2013 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <libpayload.h> +#include <stdint.h> + +struct mmio32_uart { + union { + uint32_t thr; // Transmit holding register. + uint32_t rbr; // Receive buffer register. + uint32_t dll; // Divisor latch lsb. + }; + union { + uint32_t ier; // Interrupt enable register. + uint32_t dlm; // Divisor latch msb. + }; + union { + uint32_t iir; // Interrupt identification register. + uint32_t fcr; // FIFO control register. + }; + uint32_t lcr; // Line control register. + uint32_t mcr; // Modem control register. + uint32_t lsr; // Line status register. + uint32_t msr; // Modem status register. +} __attribute__ ((packed)); + +enum { + LSR_DR = 0x1 << 0, // Data ready. + LSR_OE = 0x1 << 1, // Overrun. + LSR_PE = 0x1 << 2, // Parity error. + LSR_FE = 0x1 << 3, // Framing error. + LSR_BI = 0x1 << 4, // Break. + LSR_THRE = 0x1 << 5, // Xmit holding register empty. + LSR_TEMT = 0x1 << 6, // Xmitter empty. + LSR_ERR = 0x1 << 7 // Error. +}; + +static struct mmio32_uart *uart = NULL; + +void serial_putchar(unsigned int c) +{ + while (!(readl(&uart->lsr) & LSR_THRE)) + /* wait for transmit register to clear */; + + writel((char)c, &uart->thr); + if (c == '\n') + serial_putchar('\r'); +} + +int serial_havechar(void) +{ + uint8_t lsr = readl(&uart->lsr); + return (lsr & LSR_DR) == LSR_DR; +} + +int serial_getchar(void) +{ + while (!serial_havechar()) + /* wait for character */; + + return readl(&uart->rbr); +} + +static struct console_output_driver mmio32_serial_output = { + .putchar = &serial_putchar +}; + +static struct console_input_driver mmio32_serial_input = { + .havekey = &serial_havechar, + .getchar = &serial_getchar +}; + +void serial_init(void) +{ + if (!lib_sysinfo.serial || !lib_sysinfo.serial->baseaddr) + return; + + uart = (struct mmio32_uart *)(uintptr_t)lib_sysinfo.serial->baseaddr; +} + +void serial_console_init(void) +{ + serial_init(); + + if (uart) { + console_add_output_driver(&mmio32_serial_output); + console_add_input_driver(&mmio32_serial_input); + } +} |