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authorJonathon Hall <jonathon.hall@puri.sm>2022-12-20 11:22:35 -0500
committerFelix Held <felix-coreboot@felixheld.de>2023-06-12 15:31:25 +0000
commita4f701e114a2b973e99d5de9a340f123c4b6877a (patch)
tree22393d431ac93ed3496215d8581a31eb187dbefb /payloads/libpayload/drivers/pci_ops.c
parent37e83250e83ee00e884d38a76a5e94c91ab28d05 (diff)
mb/purism/librem_cnl: Define CMOS layout for Librem Mini v1/v2
Define a CMOS layout for Librem Mini v1/v2 spanning both banks. The only setting provided is the automatic power-on setting, which is implemented by the EC. This can now be configured in a firmware image by replacing cmos.default in CBFS. Since cmos.default is applied early in bootblock, the EC BRAM interface must now be configured in bootblock, including opening the LPC I/O range. Change-Id: Ib0a4ea02d71f6f99e344484726a629e0552e4941 Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74363 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/libpayload/drivers/pci_ops.c')
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