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authorRaul E Rangel <rrangel@chromium.org>2018-08-20 13:03:45 -0600
committerMartin Roth <martinroth@google.com>2018-09-12 14:15:48 +0000
commit9fc7b8e973fca05381be66e7053ffa301c9dbe33 (patch)
treecc31fca29d6e6afede855ca249e3de3a69da8dce /payloads/libpayload/arch/x86
parent370c116ca5fa9e9d04ed61f445debde882b6a1cb (diff)
libpayload/x86/delay: Make arch_ndelay call apic_delay if delay is long
This reduces power consumption on grunt by over 3W when sitting at the depthcharge recovery screen. BUG=b:109749762 TEST=Booted grunt in the recovery screen and made sure it continued to work. Change-Id: Id079c099ee4cf6a07724241af4400063f4551668 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/28245 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Julius Werner <jwerner@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/libpayload/arch/x86')
-rw-r--r--payloads/libpayload/arch/x86/apic.c2
-rw-r--r--payloads/libpayload/arch/x86/delay.c12
2 files changed, 14 insertions, 0 deletions
diff --git a/payloads/libpayload/arch/x86/apic.c b/payloads/libpayload/arch/x86/apic.c
index 079f456eec..99eff27aad 100644
--- a/payloads/libpayload/arch/x86/apic.c
+++ b/payloads/libpayload/arch/x86/apic.c
@@ -210,6 +210,8 @@ static void apic_init_timer(void)
/* Set APIC init counter to MAX and count for 1 ms */
apic_write32(APIC_TIMER_INIT_COUNT, UINT32_MAX);
+ /* This is safe because apic_initialized() returns false so
+ * arch_ndelay() falls back to a busy loop. */
mdelay(1);
ticks_per_ms =
diff --git a/payloads/libpayload/arch/x86/delay.c b/payloads/libpayload/arch/x86/delay.c
index 541cf7a436..19931fbc04 100644
--- a/payloads/libpayload/arch/x86/delay.c
+++ b/payloads/libpayload/arch/x86/delay.c
@@ -28,6 +28,7 @@
*/
#include <libpayload.h>
+#include <arch/apic.h>
/* The pause instruction can delay 10-140 CPU cycles, so avoid calling it when
* getting close to finishing. Depending on the timer source, the timer can be
@@ -35,12 +36,23 @@
* that the timer is running at the CPU frequency. */
#define PAUSE_THRESHOLD_TICKS 150
+/* Let's assume APIC interrupts take at least 100us */
+#define APIC_INTERRUPT_LATENCY_NS (100 * NSECS_PER_USEC)
+
+
void arch_ndelay(uint64_t ns)
{
uint64_t delta = ns * timer_hz() / NSECS_PER_SEC;
uint64_t pause_delta = 0;
+ uint64_t apic_us = 0;
uint64_t start = timer_raw_value();
+ if (ns > APIC_INTERRUPT_LATENCY_NS)
+ apic_us = (ns - APIC_INTERRUPT_LATENCY_NS) / NSECS_PER_USEC;
+
+ if (IS_ENABLED(CONFIG_LP_ENABLE_APIC) && apic_initialized() && apic_us)
+ apic_delay(apic_us);
+
if (delta > PAUSE_THRESHOLD_TICKS)
pause_delta = delta - PAUSE_THRESHOLD_TICKS;