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authorSubrata Banik <subratabanik@google.com>2022-01-28 23:49:31 +0530
committerSubrata Banik <subratabanik@google.com>2022-02-02 07:39:51 +0000
commit5a49f3aa7973cce8936bfe6600d2726904d24947 (patch)
tree70b2ade378f5103ef4f57839a2d2bf8f362a82a9 /payloads/libpayload/arch/x86
parent7ef471c67acfc4775efbd97590b931759c478380 (diff)
soc/intel/alderlake: Use PMC IPC to disable HECI1
This patch allows common CSE block to disable HECI1 device using PMC IPC command `0xA9`. Select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC config for Alder Lake to disable HECI1 device using PMC IPC. Additionally, remove dead code that deals with HECI1 disabling using in SMM as HECI1 disabling using PMC IPC is simpler solution. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I11a677173fd6fb38f7c09594a653aeea0df1332c Reviewed-on: https://review.coreboot.org/c/coreboot/+/61458 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'payloads/libpayload/arch/x86')
0 files changed, 0 insertions, 0 deletions