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authorSubrata Banik <subratabanik@google.com>2024-05-18 12:26:40 +0000
committerSubrata Banik <subratabanik@google.com>2024-05-26 01:26:31 +0000
commitafa39105d8e09e5bc9ce2053b10a40839ab9fddd (patch)
treef91dd504481261abae734b52eb12c6c46028a925 /payloads/libpayload/arch/x86/gdb.c
parent4244527d8ccf2256c567ec4c4091c5edad72d06c (diff)
libpayload: Add x86_64 (64-bit) support
This patch introduces x86_64 (64-bit) support to the payload, building upon the existing x86 (32-bit) architecture. Files necessary for 64-bit compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig option. BUG=b:242829490 TEST=Able to verify all valid combinations between coreboot and payload with this patch. Payload Entry Point Behavior with below code. +----------------+--------------------+----------------------------+ | LP_ARCH_X86_64 | Payload Entry Mode | Description | +----------------+--------------------+----------------------------+ | No | 32-bit | Direct protected mode init | +----------------+--------------------+----------------------------+ | Yes | 32-bit | Protected to long mode | +----------------+--------------------+----------------------------+ | Yes | 64-bit | Long mode initialization | +----------------+--------------------+----------------------------+ Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81968 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/libpayload/arch/x86/gdb.c')
-rw-r--r--payloads/libpayload/arch/x86/gdb.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/payloads/libpayload/arch/x86/gdb.c b/payloads/libpayload/arch/x86/gdb.c
index 7d2951282e..ad249b82da 100644
--- a/payloads/libpayload/arch/x86/gdb.c
+++ b/payloads/libpayload/arch/x86/gdb.c
@@ -15,6 +15,7 @@
#include <exception.h>
#include <gdb.h>
#include <libpayload.h>
+#include <stddef.h>
static const u8 type_to_signal[] = {
[EXC_DE] = GDB_SIGFPE,
@@ -53,12 +54,15 @@ void gdb_arch_init(void)
void gdb_arch_enter(void)
{
- u32 *esp;
-
- asm volatile ("mov %%esp, %0" : "=r"(esp) );
+ u8 *stack_pointer;
+#if CONFIG(LP_ARCH_X86_64)
+ asm volatile ("movq %%rsp, %0" : "=r"(stack_pointer));
+#else
+ asm volatile ("mov %%esp, %0" : "=r"(stack_pointer));
+#endif
/* Avoid reentrant exceptions, just call the hook if in one already. */
- if (esp >= exception_stack && esp <= exception_stack_end)
+ if (stack_pointer >= exception_stack && stack_pointer <= exception_stack_end)
gdb_exception_hook(EXC_BP);
else
asm volatile ("int3");
@@ -66,12 +70,12 @@ void gdb_arch_enter(void)
int gdb_arch_set_single_step(int on)
{
- const u32 tf_bit = 1 << 8;
+ const size_t tf_bit = 1 << 8;
if (on)
- exception_state->regs.eflags |= tf_bit;
+ exception_state->regs.reg_flags |= tf_bit;
else
- exception_state->regs.eflags &= ~tf_bit;
+ exception_state->regs.reg_flags &= ~tf_bit;
return 0;
}