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authorJohn Zhao <john.zhao@intel.com>2022-01-10 15:49:37 -0800
committerFelix Held <felix-coreboot@felixheld.de>2022-01-28 15:12:32 +0000
commit3c46371a514114aab744b86b1098dc27ebe891df (patch)
tree7b8104d1ea39ef4c2b6c6f832bde3edf7f489002 /payloads/libpayload/arch/arm64
parent0bc5d9dfff8ecd380fa914a6e0885aef04467f8d (diff)
soc/intel: Abstract the common block API for TCSS registers access
The existing TCSS registers access is through the REGBAR. There will be future platforms which access the TCSS registers through the Sideband interface. This change abstracts the common block API for TCSS access. BUG=b:213574324 TEST=Build platforms coreboot images successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I3e2696b117af24412d73b257f470efc40caa5022 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'payloads/libpayload/arch/arm64')
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