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authorUwe Hermann <uwe@hermann-uwe.de>2008-03-31 20:21:49 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2008-03-31 20:21:49 +0000
commit30d789bcbd528389749339ff03474543af1d5bf1 (patch)
treeb93262aeeeda5f226da6e3e1ad122b328c7480a6 /payloads/libpayload/Config.in
parent2d758b8bf6077796db27d055cf7d24f77ea52c4b (diff)
Fix the NVRAM access functions to work correctly for the
upper 128 bytes of NVRAM (if enabled). For most chipsets this means using I/O ports 0x72/0x73, but at least on some VIA chipsets (I tested the VIA VT8237R on actual hardware) these ports won't work and you have to use 0x74/0x75. Thus, make this a Kconfig option for now. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'payloads/libpayload/Config.in')
-rw-r--r--payloads/libpayload/Config.in16
1 files changed, 16 insertions, 0 deletions
diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in
index a1343f566b..fbb477ed7f 100644
--- a/payloads/libpayload/Config.in
+++ b/payloads/libpayload/Config.in
@@ -72,6 +72,22 @@ config NVRAM
bool "Support for reading/writing NVRAM bytes"
default y
+config RTC_PORT_EXTENDED_VIA
+ bool "Extended RTC ports are 0x74/0x75"
+ default n
+ help
+ For recent chipsets with 256 NVRAM bytes, you have to access the
+ upper 128 bytes (128-255) using two different I/O ports,
+ usually 0x72/0x73.
+
+ On some chipsets this can be a different set of ports, though.
+ The VIA VT8237R for example only recognizes the ports 0x74/0x75
+ for accessing the high 128 NVRAM bytes (as seems to be the case for
+ multiple VIA chipsets).
+
+ If you want to read or write CMOS bytes on computers with one of
+ these chipsets, say 'y' here.
+
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