From 30d789bcbd528389749339ff03474543af1d5bf1 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Mon, 31 Mar 2008 20:21:49 +0000 Subject: Fix the NVRAM access functions to work correctly for the upper 128 bytes of NVRAM (if enabled). For most chipsets this means using I/O ports 0x72/0x73, but at least on some VIA chipsets (I tested the VIA VT8237R on actual hardware) these ports won't work and you have to use 0x74/0x75. Thus, make this a Kconfig option for now. Signed-off-by: Uwe Hermann Acked-by: Jordan Crouse git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- payloads/libpayload/Config.in | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'payloads/libpayload/Config.in') diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in index a1343f566b..fbb477ed7f 100644 --- a/payloads/libpayload/Config.in +++ b/payloads/libpayload/Config.in @@ -72,6 +72,22 @@ config NVRAM bool "Support for reading/writing NVRAM bytes" default y +config RTC_PORT_EXTENDED_VIA + bool "Extended RTC ports are 0x74/0x75" + default n + help + For recent chipsets with 256 NVRAM bytes, you have to access the + upper 128 bytes (128-255) using two different I/O ports, + usually 0x72/0x73. + + On some chipsets this can be a different set of ports, though. + The VIA VT8237R for example only recognizes the ports 0x74/0x75 + for accessing the high 128 NVRAM bytes (as seems to be the case for + multiple VIA chipsets). + + If you want to read or write CMOS bytes on computers with one of + these chipsets, say 'y' here. + endmenu menu "Build Options" -- cgit v1.2.3