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author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2022-10-13 14:24:09 +0800 |
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committer | Yu-Ping Wu <yupingso@google.com> | 2022-10-25 08:27:52 +0000 |
commit | d641addf38629c553203ae1ddfa1275320a3ab2b (patch) | |
tree | 5748a6ede04bebca5ba27553556bb8926045d975 /payloads/coreinfo | |
parent | 319fce53c83f78834986ebdfc3fd33b2f60a3ffa (diff) |
soc/mediatek: Add support for input 1P mode of dp_intf
MT8195 supports 2P mode and MT8188 supports 1P mode. A new struct
member `input_mode` is added to `struct mtk_dpintf` for
differentiation. We also move SoC-specific data `dpintf_data` to soc
folder.
BUG=b:244208960
TEST=emerge-cherry coreboot.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I6d138b0ff75e005518bc8fcce06df20924b2a6ba
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'payloads/coreinfo')
0 files changed, 0 insertions, 0 deletions