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authorXavi Drudis Ferran <xdrudis@tinet.cat>2011-02-27 23:45:34 +0000
committerMarc Jones <marc.jones@amd.com>2011-02-27 23:45:34 +0000
commita5cbd25e48b5e33726ff7f7a193b10622207fd22 (patch)
treede3620b2fedb111afd7c82bc8d84168959523404 /payloads/coreinfo
parentd7294596218addf11feefb4cb2411eb7729b5b11 (diff)
Prepare for next patches (Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode). No change of behaviour intended. Refactor FAM10 fidvid . prep_fid_change was already long and it'd get longer with forthcoming patches. We now take apart F3xD4, Clock Power/Timing Control 0 to its own function. Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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