diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-10-31 10:46:56 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-02-27 06:35:25 +0100 |
| commit | bc69ae9823e9260bee6f2db557a6d26c683f4ad2 (patch) | |
| tree | 15231d8ddd509c43aa3b676203cbf80549ac1e9b /payloads/coreinfo/cpuid.S | |
| parent | 92fce495a7fa4331b7f1d49d8f8fe6bcb33761d4 (diff) | |
baytrail: add lpss iosf functions and regs
The low power subsystem devices have a lot of their
configuration done in the IOSF sideband message space.
Add support for these access methods.
BUG=chrome-os-partner:23790
BRANCH=None
TEST=Built and booted through depthcharge.
Change-Id: I0dd52b952a16ef1280c29301164db041ee87f636
Signed-off-by: Aaron Durbin <adurbin@chromum.org>
Reviewed-on: https://chromium-review.googlesource.com/175440
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4921
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'payloads/coreinfo/cpuid.S')
0 files changed, 0 insertions, 0 deletions