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authorAaron Durbin <adurbin@chromium.org>2020-04-11 10:06:37 -0600
committerAaron Durbin <adurbin@chromium.org>2020-05-01 23:28:37 +0000
commit806ea463dbc20c9a577923af51e9976baaf6790a (patch)
treee6f16749a1665aeeec900b1e0018fb6d34e77307 /gnat.adc
parent00a220877c8fc27f161017e68b67fce23117c0ad (diff)
soc/amd/picasso: add sd/emmc0 configuration to chip.h
In order to isolate mainboard code from direct FSPS manipulation allow sd/emmc0 configuration to be supplied by devicetree.cb. BUG=b:153502861 Change-Id: I2569ccccd638faaf2c9ac68fe582ecb9fa967d9f Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2146439 Commit-Queue: Aaron Durbin <adurbin@google.com> Tested-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40876 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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