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author | Marc Jones <marc.jones@se-eng.com> | 2012-10-25 14:01:37 -0600 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-12 03:27:58 +0100 |
commit | f5a11aa82f66a77a4b79b602604a8516ca187c3b (patch) | |
tree | 02cf32303de35712f906c1ea47429d0f45a937d4 /documentation | |
parent | 5986edadff53075f4bb5fe419514962c96f9faf6 (diff) |
Initialize the VMX MSR
The VMX MSR may come up with random values and needs to be
initialized to zero. This was done incorrectly in finalize_smm.
It must be done on a per core basis in the general CPU init.
This touches all Sandybridge and Ivybridge configs.
Change-Id: I015352d0f8e2ebe55ac0a5e9c5bbff83bd2ff86b
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1794
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'documentation')
0 files changed, 0 insertions, 0 deletions