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authorXavi Drudis Ferran <xdrudis@tinet.cat>2011-02-28 00:24:21 +0000
committerMarc Jones <marc.jones@amd.com>2011-02-28 00:24:21 +0000
commit1f93fea160fff042f7d5467c56eaf2fc0286995f (patch)
tree19b70c9576ea9869caed82def385177d4a08488e /documentation
parent0e5d3e16b494aafa3c08a28a0484ee0845d84512 (diff)
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode. BKDG says nbSynPtrAdj may also be 6 sometimes. Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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