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author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-17 04:31:01 -0600 |
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committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-17 17:38:50 +0100 |
commit | 8b2c8f1c10d81299196ac8413cb51330ba3d1f12 (patch) | |
tree | d865029c925449bbf401cb1f2b4ade37d008db78 /documentation/POSTCODES | |
parent | fe951d899d198e718867afe743c50314bc1b1115 (diff) |
sandybridge/raminit: Get max mem clock from devicetree
Note that the limit is not set in the devicetree.cb which use native
sandybridge raminit, as it is not needed. When that isn't set, it's
automatically set to zero, and when we find that, we automatically
return the default limit. Thus behavior isn't changed for any board.
Change-Id: I447399eea71355612b654710a56f3a0077c2f7f9
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8476
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'documentation/POSTCODES')
0 files changed, 0 insertions, 0 deletions