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author | York Yang <york.yang@intel.com> | 2014-11-04 17:04:37 -0700 |
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committer | Martin Roth <gaumless@gmail.com> | 2014-11-21 23:05:19 +0100 |
commit | fc1c1b572f3523950cdf5cbf0c2967365700cfc3 (patch) | |
tree | 2e84f2d2f0a76f005bd2d369b390ca9e88982137 /documentation/Doxyfile.coreboot | |
parent | 3fb8b0d75b2a40a1e81e10b6abe9f63c71f9066c (diff) |
intel/fsp_baytrail: add Gold3 FSP support
Baytrail Gold3 FSP adds a couple of parameters in UPD_DATA_REGION
making platform more configurable via devicetree.cb
Update the UPD_DATA_REGION structure and pass settings to FSP
Add Baytrail Gold2 and earlier FSP backward compatible, as Gold3
FSP changes UPD_DATA_REGION struct
Change-Id: Ia2d2d0595328ac771762a84da40697a3b7e900c6
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/7334
Reviewed-by: Martin Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'documentation/Doxyfile.coreboot')
0 files changed, 0 insertions, 0 deletions