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authorDuncan Laurie <dlaurie@chromium.org>2012-10-03 19:11:26 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-11-14 05:44:18 +0100
commit7978e3a3839b69c5b65de8dd8f35b4ffb8e27d93 (patch)
treed718be8af8e7f90c56fbb6180525a6b8219ac657 /documentation/AMD-S3.txt
parent7f3d442abb2a8ff6f6728527ab7665fd79fd60cd (diff)
SMM: Pass the ACPI GNVS pointer via state save map
Instead of hijacking some random memory addresses to relay the GNVS pointer to SMM we can use EBX register during the write to APM_CNT register when the SMI is triggered. Change-Id: I79a89512c40353d72ad058cbf2e6a23a696945da Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1766 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'documentation/AMD-S3.txt')
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