diff options
| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-04-07 15:16:46 +0200 |
|---|---|---|
| committer | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-07-07 07:39:21 +0000 |
| commit | 90989b321091a3b7828628304c7cf4bffcc7aed0 (patch) | |
| tree | 86d8c4b654738c9faeacc5b4e15595499d602c37 /configs | |
| parent | 1ff6125af74899dad390efa45aefa665f6cc76e9 (diff) | |
mainboard/msi/ms7d25: Add early support for MSI PRO Z690-A DDR4 WIFI
Initial mainboard code MSI PRO Z690-A DDR4 WIFI. The platform boots up
up to romstage where it returns from FSP memory init with an error.
What works:
- open-source CAR setup
- NCT6687D serial port with TX pin exposed on JBD1 header
- SMBus reading SPD from all 4 DIMMs
This board will serve as a reference board for enabling Alder Lake-S
support in coreboot. More code and functionalities will be added in
subsequent patches as src/soc/alderlake code will be improved for
PCH-S.
TEST=Extract the microcode from vendor firmware and include it in the
build. The platform should print the console on the serial port even
without FSP blob.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I5df69822dbb3ff79e087408a0693de37df2142e8
Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com>
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/config.msi_ms7d25 | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/configs/config.msi_ms7d25 b/configs/config.msi_ms7d25 new file mode 100644 index 0000000000..e016a70e4a --- /dev/null +++ b/configs/config.msi_ms7d25 @@ -0,0 +1,16 @@ +CONFIG_VENDOR_MSI=y +CONFIG_CBFS_SIZE=0x1000000 +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_TIANOCORE_BOOT_TIMEOUT=3 +CONFIG_BOARD_MSI_Z690_A_PRO_WIFI_DDR4=y +# CONFIG_SMMSTORE is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y +CONFIG_POST_DEVICE_PCI_PCIE=y +CONFIG_POST_IO_PORT=0x80 +CONFIG_PAYLOAD_TIANOCORE=y +CONFIG_TIANOCORE_REPOSITORY="https://github.com/Dasharo/edk2.git" +CONFIG_TIANOCORE_TAG_OR_REV="origin/dasharo" +CONFIG_TIANOCORE_CBMEM_LOGGING=y +CONFIG_TIANOCORE_FOLLOW_BGRT_SPEC=y +CONFIG_TIANOCORE_SD_MMC_TIMEOUT=1000 +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y |