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| author | Appukuttan V K <appukuttan.vk@intel.com> | 2024-04-03 22:57:41 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-04-30 04:46:46 +0000 |
| commit | a63ce30c93c43ccbfde26e9a68e4419e4891ff7f (patch) | |
| tree | 25537df02c581c6063092c915e1f1dc7c99520bc /configs/config.google_volteer.build_test_purposes | |
| parent | 9493c2ece2439a7a8253b18448a36dca2964fd69 (diff) | |
drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned
- Stack alignment:
1. FSP functions must be called with the stack 16-bytes aligned
in x86_64 mode.This is already setup properly with the default
value of the `mpreferred-stack-boundary' compiler option (4).
2. The FSP heap buffer supplied by coreboot through the `StackBase'
UPD must be 16-bytes aligned. This alignment is consistent for
both x86_64 and x86_32 modes to simplify the implementation.
BUG=b:329034258
TEST=Verified on Meteor Lake board (Rex)
Change-Id: I86048c5d3623a29f17a5e492cd67568e4844589c
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81661
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Krishna P Bhat D <krishna.p.bhat.d@intel.com>
Diffstat (limited to 'configs/config.google_volteer.build_test_purposes')
0 files changed, 0 insertions, 0 deletions