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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-04-28 08:30:00 +0300 |
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committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-05-09 15:34:23 +0000 |
commit | 9641c0e1023ca137e76762e11425695c34c1edbc (patch) | |
tree | 42fc6953c01d901b6191efbdf7316c4bd47fad7f /configs/config.gigabyte_ga-g41m-es2l | |
parent | effc28f23e4f9c106335af3a35096d9105810a8d (diff) |
soc/intel/xeon_sp/spr: Drop spurious FADT fields
Assigning duty_offset while duty_width==0 has no purpose.
Under intel/common/block, previous assignment for fadt->gpe0_blk
resolves GPE0_STS(0) from xeon_sp/ebg/.../soc_pm.h and also assigns
value matching pmbase + 0x60.
Change-Id: Iaf688d9471ac527ac20307cf16216abdab731a06
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74827
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'configs/config.gigabyte_ga-g41m-es2l')
0 files changed, 0 insertions, 0 deletions