mb/intel/adlrvp: Fix incorrect SPD address issue on DDR4/DDR5

Assign 7-bit address of the targeted slave SPD.

TEST=Able to read correct SPD data from SMBUS.

Change-Id: If24e61b583638be7c055541c6eb126da28b542f6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50748
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>

0 files changed, 0 insertions, 0 deletions