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author | Subrata Banik <subrata.banik@intel.com> | 2021-06-09 22:11:12 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2021-06-24 07:53:47 +0000 |
commit | 6f1cb40ee6156c19be02e149dacfcf80401bc944 (patch) | |
tree | 63d4d91994688c4a8b79848c9a1c29aa298e9730 /LICENSES/GPL-2.0-or-later.txt | |
parent | a8b419b37bd272c2a39babd6750311cb0f3640d7 (diff) |
soc/intel/alderlake: Refactor platform_fsp_silicon_init_params_cb function
Align platform_fsp_silicon_init_params_cb() function implementation
with romstage/fsp_params.c file platform_fsp_memory_init_params_cb() as:
|- Override FSP-S Arch UPD(s) using arch_silicon_init_params().
|- Override FSP-S SoC UPDs using soc_silicon_init_params().
|- Override FSP-S Mainboard UPDs using mainboard_silicon_init_params().
TEST=FSP-S UPD dump shows no change without and with this code change.
Change-Id: I4cf0b8423fb4038a7feddd97ff585027b3012605
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55293
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'LICENSES/GPL-2.0-or-later.txt')
0 files changed, 0 insertions, 0 deletions