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authorMarc Jones <marcj303@gmail.com>2017-12-01 17:17:43 -0700
committerMartin Roth <martinroth@google.com>2017-12-06 16:23:33 +0000
commit7654f86f3ab5ad87b7a224b075842a35b8b8748b (patch)
tree6cc7f96e14256fa1a2d33a601375713b510a62ab /Documentation
parent2bd52ff0bd0c3837db7a3b5d26539d1b90036f2f (diff)
soc/amd/stoneyridge: Add XHCI PM register access functions
Add functions to access the XHCI PM MMIO registers. Change-Id: I81b4c0a448eb17c5ee0562a2c3548a074d533a98 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/22677 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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