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authorFelix Held <felix-coreboot@felixheld.de>2023-11-04 06:08:41 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-11-06 19:06:43 +0000
commit49509473c753efa0b5bccf4d2fac5ddda1ee417e (patch)
treeae87e80f3084b26dbf7289360e9d31848ec98c00 /Documentation/soc/intel/xeon_sp
parent3eff900386c84637c95c884b7b752f8269a6eb2e (diff)
soc/amd/genoa/chipset.dt: add UART device ops
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I9fc155fe76c05fefd4ce31ae6b96dcc4527b6abc Reviewed-on: https://review.coreboot.org/c/coreboot/+/78901 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
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