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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-12-11 15:16:29 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-19 05:17:58 +0000
commitdca74c16a377e8287bd3c4bbe0630a1a44343aab (patch)
tree82c23d881ab1c557ba7853d20a1739c2c052046f /Documentation/soc/intel/icelake
parent84eb41d74cc555a95fa98fb07e5faff17ffc510f (diff)
Documentation/soc/intel/icelake: Fix references between documents
Change-Id: Ifbdab15b1183998712f92d1f2f5340d2ad1451dc Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/30157 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'Documentation/soc/intel/icelake')
-rw-r--r--Documentation/soc/intel/icelake/iceLake_coreboot_development.md4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
index 6f194cae15..5f8e279841 100644
--- a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
+++ b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
@@ -17,12 +17,12 @@ Like any other Intel SoC, Ice Lake coreboot development is also based on "Intel
2. Additionally provides Firmware code support for Intel Reference Platform (RVP), known as Ice lake RVP with same SoC.
```eval_rst
- :doc:`../../../mainboard/intel/icelake_rvp.md`
+ :doc:`../../../mainboard/intel/icelake_rvp`
```
3. OEMs to design based on reference platform and make use of mainboard sample code. Dragonegg is Ice Lake based mainboard developed by Google
```eval_rst
- :doc:`../../../mainboard/google/dragonegg.md`
+ :doc:`../../../mainboard/google/dragonegg`
```
### Summary: