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| author | Duncan Laurie <dlaurie@google.com> | 2020-08-13 16:17:57 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-10-14 02:55:20 +0000 |
| commit | ce3a9740f1b753b20c7a09f215d8ff21cc91646e (patch) | |
| tree | d9b483610d571af4e07163383614c5ac7392e933 /Documentation/soc/intel/fsp/ppi/ppi.md | |
| parent | d6331e0884ceb6a17f7fd446b287b7cb5e50fcc1 (diff) | |
soc/intel/common: Add SSDT generation for Intel USB4 PCIe ports
This driver will generate the ACPI _DSD for the USB4 PCIe root port
properties instead of using static ASL.
It assigns the USB4 port number and marks the port as external and
hotplug capable.
Change-Id: I7086b06346ce63fab6bef4077fb76ae1d30dc1eb
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44915
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/soc/intel/fsp/ppi/ppi.md')
0 files changed, 0 insertions, 0 deletions