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| author | Nicholas Chin <nic.c3.14@gmail.com> | 2024-10-05 20:41:31 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-10-07 20:37:35 +0000 |
| commit | 4320b5da8ff3b7e88343c1a9d5d42f8e6400833d (patch) | |
| tree | eb83effa960f447d639d12189bdd7eadd9f306d8 /Documentation/soc/cavium/cn81xx | |
| parent | e5c2babcc0d162e927a4111ebe2433fe226497ab (diff) | |
nb/intel/gm45/northbridge.c: Use config_of_soc()
Use the config_of_soc macro, which resolves to a direct pointer to the
chip config, instead of the chip_info member of __pci_0_00_0 to obtain
the same address.
Change-Id: If265819613727853d0f96dc6bb95ba71a2cfeeb1
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'Documentation/soc/cavium/cn81xx')
0 files changed, 0 insertions, 0 deletions