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author | Martin Roth <gaumless@gmail.com> | 2022-05-31 17:06:21 -0600 |
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committer | Martin L Roth <gaumless@tutanota.com> | 2022-06-02 00:13:17 +0000 |
commit | 7b739f016bfd621d5fa63ed34346eb9428751f86 (patch) | |
tree | de458aca53ee0e6abe74012cc9bbb7981bd2ed46 /Documentation/releases/coreboot-4.18-relnotes.md | |
parent | cb6377ed7146db515c6eb4fbfb97b65f9e1a5a0c (diff) |
Documentation: Update index.md and add 4.18 release notes
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I52814ebbae804ea0ff24a7cec0618054029b8b47
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64843
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'Documentation/releases/coreboot-4.18-relnotes.md')
-rw-r--r-- | Documentation/releases/coreboot-4.18-relnotes.md | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/Documentation/releases/coreboot-4.18-relnotes.md b/Documentation/releases/coreboot-4.18-relnotes.md new file mode 100644 index 0000000000..cfa47ed7ad --- /dev/null +++ b/Documentation/releases/coreboot-4.18-relnotes.md @@ -0,0 +1,56 @@ +Upcoming release - coreboot 4.18 +================================ + +The 4.18 release is planned for August 2022. + +Update this document with changes that should be in the release notes. + +* Please use Markdown. +* See the past few release notes for the general format. +* The chip and board additions and removals will be updated right + before the release, so those do not need to be added. + +Significant changes +------------------- + +### Add significant changes here + + + + + + + + + + + +Plans for Code Deprecation +-------------------------- + + +### Intel Icelake + +Intel Icelake code will be removed following the 4.19 release, planned +for November 2022. This consists of the Intel Icelake SOC and Intel +Icelake RVP mainboard + +Intel Icelake is unmaintained. Also, the only user of this platform ever +was the CRB board. From the looks of it the code never was ready for +production as only engineering sample CPUIDs are supported. This reduces +the maintanence overhead for the coreboot project. + + +### LEGACY_SMP_INIT + +Legacy SMP init will be removed from the coreboot master branch +immediately following this release. Anyone looking for the latest +version of the code should find it on the 4.18 branch. + +This also includes the codepath for SMM_ASEG. This code is used to start +APs and do some feature programming on each AP, but also set up SMM. +This has largely been superseded by PARALLEL_MP, which should be able to +cover all use cases of LEGACY_SMP_INIT, with little code changes. The +reason for deprecation is that having 2 codepaths to do the virtually +the same increases maintenance burden on the community a lot, while also +being rather confusing. |