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authorAngel Pons <th3fanbus@gmail.com>2020-05-02 20:00:32 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-05-21 18:27:13 +0000
commitb631d07494805d7e3c7729ebd12c25f2166ff550 (patch)
tree301a3ac39cf3d80c20728b9e82f2bfef43b3d2c2 /Documentation/mainboard/lenovo
parent7ed04e460d4e3e99af82c4bb445e4e1b3ac1dd47 (diff)
nb/intel/sandybridge: Refactor IOSAV_SUBSEQUENCE again
To replace the register writes with assignments to struct fields, we would need to have the values as parameters of a single macro. So, split the raw value of `IOSAV_n_SP_CMD_CTRL_ch` in two parts. Note that the single command that sets bit 17 is likely wrong, but it will be fixed after refactoring. For now, we'll treat it as part of `ranksel`. Move the parameters of `ADDR_UPDATE` into the top-level IOSAV macro. Hopefully, this will be enough to replace the underlying implementation. Line length limits are not for review. Breaking the lines unnecessarily complicates search and replace operations, and wil be taken care of in subsequent commits. Tested with BUILD_TIMELESS=1, ASUS P8Z77-V LX2 remains unchanged. Change-Id: I404edbd5d90ddc2a6993f39f552480d1ef24e153 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40978 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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