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authorXiang Wang <wxjstz@126.com>2018-10-11 17:30:37 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-11-05 09:03:40 +0000
commit7c9540ea1d46a776ec92b58f99074f51b430f9bb (patch)
treedc9b3d25062791f40edd72ddcccaa3dd0171b85c /Documentation/lib/payloads
parentc85f9c589726caba41970d5fbdadd8a147dd7956 (diff)
riscv: add support smp_pause / smp_resume
See https://doc.coreboot.org/arch/riscv/ we know that we need to execute smp_pause at the start of each stage and smp_resume at the end of each stage. Change-Id: I6f8159637bfb15f54f0abeb335de2ba6e9cf82fb Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/29023 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Philipp Hug <philipp@hug.cx>
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