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authorSumeet R Pawnikar <sumeet.r.pawnikar@intel.com>2020-05-15 15:55:37 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-05-20 09:14:11 +0000
commitd2132469ae86d7287576a2ba3211cdbfeb572703 (patch)
tree2f9ccb52774aba1a0e0f9a2d85b59d52a5d1d9c0 /Documentation/doxygen
parent425d8640fa3d8e4a43bd9f2cc8f8fd7fedf675c3 (diff)
tigerlake: update processor power limits configuration
Update processor power limit configuration parameters based on common code base support for Intel Tigerlake SoC based platforms. BRANCH=None BUG=None TEST=Built and tested on volteer system Change-Id: Iccd387d78bb45ca3de73f531a901d1d3f793d7bd Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39345 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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