diff options
| author | Reka Norman <rekanorman@chromium.org> | 2023-09-22 15:26:58 +1000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-10-04 15:29:57 +0000 |
| commit | d2f6b3fa9c068c9a0177a2eb921a4b69a34b8447 (patch) | |
| tree | 07b870e2a3da23a7e0afd394f5a27591ed4488c9 /Documentation/coreboot_logo.bmp | |
| parent | a5215c4eb3a4cbe0ef32257c4da2e5a6e0febdef (diff) | |
soc/intel/jasperlake: Enable wake from USB
Use the common UWES ACPI method to enable wake from USB. The only
difference to other SoCs is that JSL only has 8 USB2 ports, so the USB3
PORTSC register offset is different.
BUG=b:300844110
TEST=When enabled on taranza, all USB2 and USB3 ports can wake from
suspend
Change-Id: Ibc90246965d5d809123e954847543d28d78498a5
Signed-off-by: Reka Norman <rekanorman@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78086
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Diffstat (limited to 'Documentation/coreboot_logo.bmp')
0 files changed, 0 insertions, 0 deletions