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authorAngel Pons <th3fanbus@gmail.com>2021-06-23 16:14:56 +0200
committerAngel Pons <th3fanbus@gmail.com>2022-08-14 10:53:47 +0000
commit4a8cb30222a34de760d38c7d13d54e24221d9fec (patch)
tree66036e3c07862166c9ae78acac453e4242c07d11 /Documentation/coreboot_logo.bmp
parentae626d30355b4744762d2c434e159ba9c3998783 (diff)
soc/intel/broadwell: Consolidate SPD handling
Mainboards do not need to know about `pei_data` to tell northbridge code where to find the SPD data. As done on Haswell, add the `mb_get_spd_map` function and the `struct spd_info` type to retrieve SPD information from mainboard code without having to use `pei_data` in said mainboard code. Unlike Haswell MRC, Broadwell MRC uses all positions of the `spd_data` array, not just the first. The placeholder SPD address for memory-down seems to be different as well. Adapt the existing code to handle these variations. Once complete, the abstraction layer for both MRC binaries will have the same API. Change-Id: I92a05003a319c354675368cae8e34980bd2f9e10 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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