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| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-06-23 10:52:01 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2021-06-24 10:02:06 +0000 |
| commit | 6da7fa26b021ecf36757c66869f49352bfdcacac (patch) | |
| tree | 6b84ffcb29975a50fcb4053b80a47877240e2ffe /Documentation/codeflow.svg | |
| parent | cd96fed5dc3a203b076cbc74b337e59020d924ae (diff) | |
soc/intel/cache_as_ram.S: Fix SOC_INTEL_APOLLOLAKE
Intel Apollolake does not support the bootguard MSRs 0x139 MSR_BC_PBEC
and 0x13A MSR_BOOT_GUARD_SACM_INFO.
Change-Id: Ief40028a1c85084e012a83db8080d478e407487b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'Documentation/codeflow.svg')
0 files changed, 0 insertions, 0 deletions