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authorAngel Pons <th3fanbus@gmail.com>2021-04-17 13:30:40 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-04-21 09:18:00 +0000
commit6a2ece7bd11d5ab2015af6ae01f119c1b532ca19 (patch)
treefdd2303e12f15de9bddaed1f8a5c489554a87146 /Documentation/acpi
parent505e383ccbe4cec2483341833e92ea8c1d9330e8 (diff)
soc/intel/xeon_sp: Align pmc.c and pmutil.c with Skylake
Move code that gets used in stages other than ramstage to pmutil.c and only build pmc.c in ramstage. This is done for consistency with other platforms. Change-Id: Iefb4fc86f3995ee6f259b7b287e04f7f94d8d025 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52465 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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