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authorAngel Pons <th3fanbus@gmail.com>2021-06-04 12:13:40 +0200
committerWerner Zeh <werner.zeh@siemens.com>2021-06-07 04:58:34 +0000
commit6e7f9d6824e85c45be63ceb5c6f86194ec4b38e8 (patch)
tree1c4dd329158952c7c53420abb6d8deabfd1a393c /Documentation/_static
parent151d561dddd99c4e0841789d93f16a7797a7819d (diff)
cpu/intel/model_206ax/acpi.c: Do not report P_BLK
IO MWAIT redirection is disabled, which means reads to the P_LVL2 and P_LVL3 "registers" will never produce any C-state transition requests. Moreover, the register resource descriptors for all reported C-states use the FFixedHW address space, not I/O. Change-Id: I026835dd24d7ac1e1bae2d851e011e1670abaad4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55215 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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