diff options
| author | Shelley Chen <shchen@chromium.org> | 2017-06-09 13:05:29 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-20 03:16:51 +0200 |
| commit | 5aa64b97db0577f4ba2e83b36fc41d33453cfb3d (patch) | |
| tree | 3e7acc2cad4203f3e314261948b786f9930bf67b /Documentation/Intel | |
| parent | db287aad2547d6bc4a710c8a511448b5ff5ebead (diff) | |
google/fizz: Enable cr50 over SPI
By default disabled. Will need to add
FIZZ_USE_SPI_TPM config to enable.
BUG=b:62456589, b:35775024
BRANCH=None
TEST=Reboot and ensure that TPM works in verstage
CQ-DEPEND=CL:530184
Change-Id: I14ce73a1c3745c996b79c4d4758ca744e63a46b4
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/20134
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/Intel')
0 files changed, 0 insertions, 0 deletions