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authorSubrata Banik <subratabanik@google.com>2021-12-27 10:25:55 +0000
committerFelix Held <felix-coreboot@felixheld.de>2022-01-25 16:13:04 +0000
commite8feab018bb787d3dc54ec49f59ee6fb25bde3a6 (patch)
tree09611ab36584f860cefb5931150d14d3e3eb9b9c /Documentation/AMD-S3.txt
parent7f8ab005ca20bdd70368de1c4f4dcfea5a42ff86 (diff)
drivers/intel/fsp2_0: Make FSP Notify Phase APIs optional
The FSP API is used to notify the FSP about different phases in the boot process. The current FSP specification supports three notify phases: - Post PCI enumeration - Ready to Boot - End of Firmware This patch attempts to make calling into the FSP Notify Phase APIs optional by using native coreboot implementations to perform the required lock down and chipset register configuration prior boot to payload. BUG=b:211954778 TEST=Able to build brya without any compilation issue and coreboot log with this code changes when SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT and SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE config enabled. coreboot skipped calling FSP notify phase: 00000040. coreboot skipped calling FSP notify phase: 000000f0. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ia95e9ec25ae797f2ac8e1c74145cf21e59867d64 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60402 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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