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authorTim Wawrzynczak <twawrzynczak@chromium.org>2021-06-18 12:40:38 -0600
committerPatrick Georgi <pgeorgi@google.com>2021-06-21 05:30:19 +0000
commit8a6907c59219787d32608e1579b431a0ea2bffe4 (patch)
treec1d29a33a5dd9061195a8d73cba007e879edcfa4 /AUTHORS
parente380a43803135f85ce5c0ebf8b836014a64259e6 (diff)
include/pci_def.h: Add some PCI Power Management CSR bits
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I84c8470764a4e6e09220044966111ffe72078099 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55674 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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