asus/p2b, emu/qemu-i440fx: Use acpigen_write_processor_device()

FADT duty_width/duty_offset fields, together with P_CNT (previously
P_BLK) IO address are provided with _PTC entry.

FADT p_lvl2/3_lat fields had values that disabled C2/C3 state
transitions so _CST entries are not required.

Change-Id: I629cd0793f6a64e955e197400efaa7d9d898e775
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74440
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

0 files changed, 0 insertions, 0 deletions